docs: add the HDK

code/HDK/OSPACK.INC

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+        .xlist
+; Include file - OSPACK.INC
+; Epoc/Os Sibo packs include file.
+; Copyright (c) Psion PLC 1989-90.
+;
+;  VER    DATE    BY  DESCRIPTION
+; ----- -------- ---- -----------
+; 2.00F 30/09/90 CJ   Final release
+; 2.50A 24/01/93 NSM  Changed to support S3B/C
+;
+DoorOpen	equ	001h
+DoorClosed	equ	000h
+;
+; ASIC4 STRUCTURES AND REGISTER BITS
+; ==================================
+;
+ASIC5TYPE		equ	0
+ASIC4TYPE		equ	1
+;
+ASIC4R	struc
+A4Data		db	 ?
+A4Portb		db	 ?
+A4IncAddress	db	 ?
+A4Address	db	 ?
+A4Dum4		db	 ?
+A4Dum5		db	 ?
+A4Dum6		db	 ?
+A4Control	db	 ?
+ASIC4R	ends
+;
+A4PortbMode	equ	A4IncAddress
+A4InfoR		equ	A4Portb
+A4CsSetupW	equ	A4Portb
+A4XInfo record A4MXPeriph:1,A4MXType:1,A4MXDevices:1,A4MXBlocks:1, \
+	       A4MXCheat:1,A4MXExtra:2,A4MXLowBat:1
+;
+A4SpecialMode	equ	2
+A4NormalMode	equ	0
+;
+A4LBO		equ	080h		; Enable low battery check
+SetVppOn	equ	010h		; Enable VPP bit in A4CONTROL
+SetVppOff	equ	000h		; Disable VPP
+VppOnDelay	equ	5		; i.e. 5ms.
+BatteryDelay	equ	1		; 1 ms
+;
+; INTEL FLASH EPROM COMMANDS
+; ==========================
+;
+ReadCmd		equ	0		; Set into read mode when VPP is on
+EraseCmd	equ	020h		; Start erase cycle
+EraseVerifyCmd	equ	0a0h		; Erase verify byte
+ProgramCmd	equ	040h		; Start program cycle
+ProgramVerifyCmd equ	0c0h		; Program verify byte
+MaxProgramPulses equ	25		; Number of programs per byte
+MaxErasePulses	equ	1000		; Number of erase cycles
+EraseDelay	equ	10		; Erase program delay 10mS
+;
+; INTEL TYPE2 FLASH EPROM COMMANDS
+; ================================
+;
+Type2ReadCmd		equ	0FFh	; Read byte with VPP on
+Type2EraseCmd		equ	0D0h	; Start erase cycle
+Type2EraseSetup		equ	020h	; Erase verify byte
+Type2ProgramCmd		equ	040h	; Start program cycle
+Type2ClearStatus	equ	050h	; Clear status byte
+Type2ReadStatus		equ	070h	; Read status byte
+Type2MaxProgramPulses 	equ	1	; Number of programs per byte
+Type2ProgramTimeout	equ	150	; 150 frames at 3.2 us is >450 us.
+Type2EraseTimeout	equ	321	; 320 ticks is 10 seconds.
+;	Status Register Format
+Type2StatusBusy		equ	80h
+Type2EraseSuspended	equ	40h
+Type2EraseSuccess	equ	20h
+Type2WriteSuccess	equ	10h
+Type2VPPFail		equ	08h
+;
+if	HandHeld
+  if	Corporate or S3c
+Max01Units      equ     2
+  else
+Max01Units      equ     3
+  endif
+else
+Max01Units      equ     4
+endif
+;
+; DATA STRUCTURES
+; ===============
+;
+InfoRec record PackType:3,NumberOfChips:2,BlocksPerChip:3
+;
+TypeRam			equ	0
+TypeIntelFlash		equ	1
+Type2IntelFlash		equ	2
+TypeUnknown		equ	3
+TypeRom			equ	6
+TypeWriteProtected	equ	7
+;
+UnitShiftNumber		equ	4 ; 2^UnitShift must equal size of UnitInfo
+;
+UnitInfo struc			; This must be an whole power of 2
+UnitStatus		db	?
+UnitType		db	?
+UnitDevices		db	?
+UnitAsicType		db	?
+UnitChanged		db	?
+UnitReadCmd		db	?
+UnitTotalSectors	dw	?
+UnitMask		dw	?
+UnitSectorsPerDevice	dw	?
+UnitSpare		db	?
+UnitShift		db	?
+UnitDoReadCmd		dw	?
+UnitInfo ends
+;
+UnitBufferInBxFromBl macro
+	xor	bh, bh
+	rept	UnitShiftNumber
+	shl	bx, 1
+	endm
+	add	bx, offset OsDataGroup:OsUnitInfoBuffer
+	endm
+;
+	.list
+