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feat: final v1 case design

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Lyra Thorpe
2026-02-13 10:49:46 +00:00
parent 689977ff00
commit 43f6468647
2 changed files with 935 additions and 539 deletions
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30
Case-Lolin-ESP32-S3.scad
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@@ -1,8 +1,8 @@
esp32_width = 25.6; esp32_width = 25.8;
case_height = 6; case_height = 12;
esp32_length = 65.5; esp32_length = 65.8;
esp32_secondary_length = 60; esp32_secondary_length = 60.2;
wall_thickness = 0.5; wall_thickness = 1;
usb_thickness = 3.3; usb_thickness = 3.3;
usb_width = 9.1; usb_width = 9.1;
@@ -18,21 +18,25 @@ module generateCase() {
translate([wall_thickness+3,wall_thickness,wall_thickness+1]) translate([wall_thickness+3,wall_thickness,wall_thickness+1])
cube([esp32_width-6, esp32_length, case_height]); cube([esp32_width-6, esp32_length, case_height]);
// Generate slot for OTG Port // Generate slot for OTG Port
translate([wall_thickness+2,0,wall_thickness+1.1]) translate([wall_thickness+2.1,0,wall_thickness+1.1])
cube([usb_width,2,usb_thickness]); cube([usb_width,2,usb_thickness]);
// Generate slot for UART port // Generate slot for UART port
translate([(wall_thickness+esp32_width-usb_width-2),0,wall_thickness+1.1]) translate([(wall_thickness+esp32_width-usb_width-2.1),0,wall_thickness+1.1])
cube([usb_width,2,usb_thickness]); cube([usb_width,2,usb_thickness]);
} }
} }
// 19.5 bracket slot module generateLid() {
module generateBracket() { union() {
cube([(esp32_width+(wall_thickness*2)), (esp32_length+(wall_thickness*2)), 1.5]);
cube(19.5, 10, 0.5); translate([wall_thickness, wall_thickness, 1.5])
cube([esp32_width, esp32_secondary_length, 1.0]);
translate([wall_thickness+3, esp32_secondary_length, 1.0])
cube([esp32_width-6, 5.5, 1.5]);
}
} }
generateCase(); generateCase();
translate([esp32_width+5,0,0])
generateLid();

1444
Output/Case-Lolin-ESP32-S3.stl
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